Some how over the course of the past year Wavecrest went out of business without my even noticing it. Wavecrest makes a type of signal integrity measurement device called a time interval analyzer. This device measures the time between edges in a data or clock signal and uses that information to perform powerful jitter measurements. Mike Li used to be part of Wavecrest and he was well known for presenting jitter theory papers at industry conferences such as DesignCon. I seem to recall that he wasn’t with Wavecrest anymore the last time I saw a paper he presented. I was always interested in their equipment, but have never been able to justify the expense for the level of usage that my company would have. It appears that the assets of wavecrest were acquired by former employees who started a new company called Gigamax Technologies. In checking their web page, I don’t think they have any really new products yet, but it is something that I will keep an eye on. If anyone has had experience using the Wavecrest or Gigamax equipment, please post your experiences as a comment.
One other thought that I have is regarding the size of the signal integrity measurement equipment marketplace. If signal integrity is truly a big design challenge, wouldn’t there be enough room in the marketplace for Wavecrest? My impression was that their equipment was similar in cost to other types of equipment (maybe a bit more expensive), but very capable. Are digital system designers bothering to make the engineering confidence measurements on their systems, or are they relying on the chip vendors to provide proven solutions that drop into standard applications with good high speed digital layout rules? I would expect that the chip vendors would have to use this type of equipment to validate their chip designs, but perhaps system designers don’t bother. May BER testing across temperature extremes and in environmental stress tests is sufficient to give confidence in a design without needing expensive SI test equipment. Serial designs really do embed a lot of complexity into the communication link to become more tolerant of imperfections in the channel. Is detailed signal integrity simulation, analysis, and verification becoming the realm of the chip vendors? No one would argue that a bad system design could ruin a high speed serial communication link, but you don’t need detailed SI analysis to get a good enough design.
I don’t necessarily believe the above, but these are the questions swirling in my mind right now. I’m interested to hear opinions from SI engineers but also from digital system designers. How important is signal integrity simulation, analysis, and measurement to the system design process for multi-gigabit serial interfaces?